Job Description
The world is transforming and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on Earth.
The Advanced Architecture Development Group (AADG – GDC) is a CPU Core development team in Guadalajara, Mexico. We believe that developing these technologies takes a team of exceptionally talented individuals who work together to visualize, innovate, and make the future of computing possible. If you are excited about advanced development of breakthrough technologies for future-generation CPU cores, we welcome you to join us, to do something wonderful.
The focus of this role is to be part of a team of pre-silicon verification engineers to verify new and existing features for Intel’s next generation CPU IP resulting in bug free final design. You will be responsible for exhaustively validating the RTL implementation of new architecture and microarchitecture capabilities using a combination of standalone and top level test environments as well as formal verification.
Role responsibilities include although not limited to:
Developing pre-Si validation test plans and test scenarios to prove the correctness of the design
Development of SW based components for a simulation-based environment: bus functional models, trackers, checkers, scoreboards, and testbenches
Performing and debugging digital simulations, and driving to closure of bugs
SW/Script based Test content creation
Working closely with design engineers, micro-architects, and other team members to ensure high quality of test plans, functional coverage, and tests
Willingness to deliver high-quality output against deadlines and able to work effectively in a cross-site team environment
Qualifications
You must possess the below minimum qualifications to be initially considered for this position:
Candidate should have a Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
Coursework, Internship and/or experience should be at least 3 months of experience in the following areas:
Solid proven knowledge of at least one programming/scripting languages such as C/C++, Python, Perl, Ruby.
Digital design, ASIC/SoC/FPGA design flow and computer architecture.
Debug capabilities.
The following preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates:
Assembly language experience
Experience with hardware description languages (such as VHDL, Verilog or System Verilog)
Functional coverage concepts and implementation, Basic testbench development and test scenarios writing.
Skills pertaining to pre-Si validation, examples include: logic simulators (Xilinx, Quartus, Modelsim, VCS)
A candidate who accepts an offer of employment is required to present their own personal identification information and numbers for the following: Mexican Security Number (NSS), Tax Identification Number (RFC) and CURP identification number.
Inside this Business Group
The Advanced Architecture Development Group (AADG) is a CPU Core development team in Portland, Oregon. If you are excited about advanced development of breakthrough technologies for future-generation CPU cores, please join us. We believe that developing these technologies takes a team of exceptionally talented individuals who work together to visualize, innovate, and make the future of computing possible. Join us to do something wonderful!
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
JobType
Hybrid
